From Offline to
Real-Time Simulation

GridRosetta is an automated framework that translates validated DIgSILENT PowerFactory models into RSCAD for real-time EMT simulation on RTDS hardware — preserving network topology, component-level behavior, and control-system structures. Developed at KAUST, published at IEEE ISGT 2026.

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80–90%
reduction in model
conversion effort
26+
PowerFactory component
classes mapped
52+
IEEE-standard
controllers supported
ANGLE Lab · KAUST CEMSE · Vision 2030 Aligned
Try the pipeline

Drag a system into the converter

Pick an IEEE reference model to translate end-to-end in your browser. No account, no upload — the conversion runs on a recorded timeline from the real pipeline.

IEEE
9-BUS
9 b · 3 g · 3 l
IEEE
39-BUS NE
39 b · 10 g · 46 l
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MAP
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▯OUTPUT
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Open in GridRosetta Download package (.zip)
Weeks
Of specialist engineering effort to manually rebuild a PowerFactory model in RSCAD — format translation, component mapping, layout, and validation done by hand per project.
Zero
Automated PF → RSCAD tools exist commercially. RTDS native case conversion only supports PSS/E; custom DSL controllers are silently dropped and topology is lost.
Rising
IBR penetration demands real-time EMT + HIL validation for grid-forming inverters, HVDC, protection coordination — where offline studies alone are no longer sufficient.
The Framework

Two Layers.
One Automated Pipeline.

GridRosetta combines a live-API conversion engine with rigorous benchmarking to deliver RSCAD models whose steady-state, dynamic, and fault behaviour match the source PowerFactory reference.

Layer 1 · Automation
Live-API Translation Engine
A Python pipeline that interfaces directly with the DIgSILENT scripting API, bypassing the lossy DGS export path. Reads the full object tree, reconstructs the connectivity graph, and emits a complete RSCAD FX draft.
Full PF object-tree access via the Python API — no DGS round-trip
Unified mapping across 26+ component classes: generators, transformers, lines, loads, VSCs, batteries
Two-path control dispatch: 52+ IEEE-standard controller templates, plus structural DSL reconstruction for custom blocks
Single-line-diagram layout preserved in the RSCAD canvas
Outputs RTFX archive plus RSCAD line-constants (.tli) files
DIgSILENT Python API  PyAPI-RTS  RSCAD FX
Layer 2 · Validation
Control-Aware Benchmarking
Every converted model passes a quantitative benchmark against its PowerFactory reference — steady state, load change, and short-circuit fault. Results ship with the model so the user never accepts a black-box handover.
Steady-state comparison: bus voltages, active & reactive power, generator outputs
Dynamic response: load-change event, settling behaviour, closed-loop control
Fault waveform: three-phase short-circuit, DC offset, phase voltage trajectories
Control equivalence: IEEE PSS1A, DC1A, TGOV1 and beyond
Benchmarked on IEEE 9-bus and custom grid-forming (GFM) control-based systems
AVR · Governor · PSS  GFM / GFL  HIL Testing
Architecture

A Five-Stage Translation Pipeline

Each stage addresses one of the three core limitations of legacy DGS-based conversion: incomplete data extraction, missing control logic, and loss of topological fidelity.

1
Data Acquisition Live PF Python API; full object tree + load-flow results
2
Component Translation 26+ PF element classes mapped to RSCAD equivalents
3
Control Translation 52+ IEEE templates, or structural DSL reconstruction for custom blocks
4
Topology & Layout Frame-level connections + single-line-diagram transfer
5
Output Generation RTFX archive + TLINE constants + LF initialization
Live PF API, Not DGS
Direct access to the live PowerFactory study session via the Python API avoids the DGS export path entirely — no missing parameters, no placeholder PQ source injections, no tedious case file fiddling.
Control-System Aware
Unified dispatch: IEEE-standard controllers (PSS1A, DC1A, TGOV1, …) map to RSCAD library blocks; non-standard DSL controllers are reconstructed block-by-block from their BlkDef graph or equation form.
Topology-Preserving
Spatial layout is transferred from the PF single-line diagram to the RSCAD canvas. Bus-wire synthesis, component orientation, and hierarchy boxes mirror the source model — no manual redrawing.
Validation Methodology

Benchmarked Against
the PowerFactory Reference

Every GridRosetta translation is validated by running identical disturbance scenarios in both environments and comparing voltage, active power, reactive power, and phase waveforms. Published results cover the IEEE 9-bus benchmark and a custom grid-forming control-based system.

This four-metric validation stack is designed for EMT-to-EMT translation — an area with no dedicated CIGRE or IEEE standard today — filling a clear gap in industry practice for IBR-rich systems.

1
Steady-State Agreement
Bus voltages, active/reactive power, generator outputs vs. the PF load flow
voltage ≤ 2%
2
Load-Change Dynamic Response
Active / reactive power trajectory, settling time, steady-state offset
power ≤ 3%
3
Short-Circuit Fault Waveform
Three-phase bus-bar SC fault, phase-A voltage and current waveforms, DC offset
envelope match
4
Control-Loop Equivalence
AVR / governor / PSS signal-level match; inverter current/power loops for GFM cases
signal < 5%
Aligned with Industry Standards and Benchmark Systems
IEEE 9-bus
IEEE Std 1110-2019
IEEE PSS1A
IEEE DC1A
IEEE TGOV1
IEEE 1547-2018
IEC 61400-27
CIGRE C4 WGs
NERC MOD-026/027
NERC EMT Guideline
RSCAD FX
DIgSILENT PF 2024
Addressable Market

Built for PF Users Running RTDS

Anyone who owns a PowerFactory model and needs it running on RTDS hardware for hardware-in-the-loop testing, controller validation, or grid-code studies.

Transmission System Operators
National grids · ISO/TSOs · operator training simulators
TSOs maintain validated PF planning models and need real-time equivalents for HVDC factory acceptance testing, protection coordination studies, and operator training simulators. Manual conversion diverts scarce specialist engineers for months per project.
Use case: weeks saved per FAT cycle
HVDC & FACTS OEMs
Inverter, HVDC, STATCOM, and protection vendors
OEMs receive customer network models in PF for factory acceptance testing and must rebuild them in RSCAD before FAT can begin — a bottleneck on every HVDC project timeline and a recurring source of schedule slip.
Use case: FAT readiness in days
Renewable & IBR Developers
Wind, solar, BESS, grid-forming inverters
Grid-code compliance for IBRs increasingly requires real-time EMT studies against a certified network model. ENTSO-E, NERC, AEMO and Saudi-specific regulators mandate EMT validation for new interconnections — GridRosetta halves the prep work.
Use case: grid-code EMT studies
Research Institutes & Universities
NREL · EPRI · Fraunhofer IEE · TU Delft · KAUST · CREST
Research projects routinely bridge PF planning studies with RTDS HIL experiments. Model conversion is a bottleneck that delays publications and grant deliverables. Academic licensing and integration with the Grid Cortex digital twin framework are already in flight.
Use case: HIL experimentation at pace
Roadmap

Five Phases Shipped. More On the Way.

From the first prototype in 2024 through today's hosted converter at gridrosetta.com — and ahead into parallelization, broader component coverage, and AI-assisted validation.

Phase 1
Core Translation Engine
Live PF Python API integration · synchronous machines, transformers, lines, loads · RTFX packaging
Shipped 2024
✓
✓
Phase 2
GFM & Advanced Models
Grid-forming converter (UCM_LEV2) · DSL-to-RSCAD control compilation · battery pairing · IEEE exciter / governor / PSS defaults
Shipped 2025
Phase 3
Smart Layout & Topology
Single-line-diagram guided placement · auto transformer orientation · bus-crossover handling · disconnected-port auto-repair
Shipped 2025
✓
✓
Phase 4
GridRosetta Web Interface
Browser-based converter GUI · PF ↔ RSCAD side-by-side comparison · interactive canvas editor · 52+ IEEE controllers assimilated
Shipped 2026
Phase 5
Online Deployment
gridrosetta.com live behind Cloudflare tunnel · self-hosted auth with email + password and optional Google / Microsoft OAuth · per-user job tracking and audit log
Shipped 2026 · Current
✓
6
Phase 6
Parallel Processing & Tiers
Multiple PF workers with load balancing · per-account usage tiers · priority queue for pro subscribers · large-network support on multi-rack RTDS
Planned
Phase 7
Library Expansion
Grid-following (GFL) inverters · HVDC link translation · wind and solar plant templates · FACTS devices (SVC, STATCOM) · protection-relay mapping
Planned
7
8
Phase 8
Validation & AI
Automated load-flow comparison against the PF reference · AI-assisted parameter mapping for non-standard controllers · auto test-case generation for benchmark suites
Planned
…
AND BEYOND
Team

Built at KAUST

GridRosetta is developed at the King Abdullah University of Science and Technology, in the Computer, Electrical and Mathematical Sciences and Engineering (CEMSE) division, under the ANGLE Lab and the CREST center of excellence.

Prof. Shehab Ahmed
Principal Investigator
Prof. Shehab Ahmed
Professor of Electrical & Computer Engineering
CEMSE · KAUST
shehab.ahmed@kaust.edu.sa
Prof. Charalambos Konstantinou
Principal Investigator
Prof. Charalambos Konstantinou
Associate Professor of Electrical & Computer Engineering
CEMSE · KAUST
charalambos.konstantinou@kaust.edu.sa
Dr. Mohammad Asim Aftab
Research Scientist
Dr. Mohammad Asim Aftab
CEMSE · KAUST
mohammad.aftab@kaust.edu.sa
Guang An Ooi
Postdoctoral Fellow
Guang An Ooi
CEMSE · KAUST
guang.ooi@kaust.edu.sa
Muhammad Zeeshan
Ph.D. Student
Muhammad Zeeshan
CEMSE · KAUST
muhammad.zeeshan@kaust.edu.sa
Now open for pilot engagements

Convert Your First
PowerFactory Model

Launch the GridRosetta converter to upload a .pfd file and receive a fully-structured RSCAD FX draft plus line-constants files. Or get in touch to discuss a pilot engagement with custom control models or large-scale networks.

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A KAUST research project operated through CEMSE · CREST